extend "Struct-of-array-of-packed-structs" to oneAPI device #122670
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Reference: blender/blender#122670
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Delete Branch "xavierh/blender:xavier/PackedState"
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This follows #122015
Gain for Intel GPUs is lower (1-4% on my A770) but welcome.
It appears after DPC++ upgrade (already planned for 4.2 with #122242)
WIP: extend "Struct-of-array-of-packed-structs" to oneAPI deviceto extend "Struct-of-array-of-packed-structs" to oneAPI device@blender-bot build +gpu
@ -28,2 +28,2 @@
#define KERNEL_STRUCT_MEMBER(parent_struct, type, name, feature) \
state_size += (kernel_features & (feature)) ? sizeof(type) : 0;
#ifdef __INTEGRATOR_GPU_PACKED_STATE__
See my comment in #122015, this needs to be a runtime check on the host side.
I had a quick pass at making this a runtime check, but the changeset started getting quite big. A couple of approaches I started on:
IntegratorStateGPU
, one for the packed layout (IntegratorStateGPU_packed
) and one for the traditional layout (IntegratorStateGPU_separate
), then have separate host-side setup functions (possibly templated) to deal with both layouts.IntegratorStateGPU
in all host-side code, and instead perform any setup based on pointer offsets / struct sizes etc that can be calculated at run time.I'm not sure I understand the second option, would this involve running some GPU kernel to compute those pointers offsets?
If so, the first option sounds better to me.
If somehow we can figure out a way to make this perform well on CUDA, we could avoid this problem entirely. Because it's not entirely clear that it should be slow. But I don't currently have much time to look into this.
I mean that we could derive offsets/sizes numerically instead of relying on symbols (e.g.
memcpy(current_offset, ...); ... ; current_offset += 1;
instead ofmemcpy(&integrator_state_gpu_.parent_struct[array_index].name, ...
), but when I tried it was quite fiddly trying to get that to track the layout that the shader compiler makes.the tricks with offsets is needed only for Apple as other platforms do have un-padded float3, maybe that simplifies things? I've rebased the changes on top of master, not started to implement a solution yet.
I think something like this wouldn't be too bad
For the CPU side layout we just need to CPU and GPU to be consistent about float3 / packed_float3. The Metal trick of stuffing dP and dD into .w coordinates shouldn't spill over into the CPU setup code, I think.
The main issue I ran across is a different thing... that
IntegratorStateGPU
has different fields in each case, so the CPU needs to be aware of this somehow. Either by having two versions of the struct (e.g. in Brecht's snippet, the "if" block would refer to sayIntegratorStateGPU_packed
and the "else" block toIntegratorStateGPU_separate
), or by avoiding all use of concreteIntegratorStateGPU
types in CPU code and determining field offsets / struct sizes / etc programmatically (which is a bit fiddly and probably harder to maintain).We could also store both pointers in the same struct, not sure if that would impact performance.
CC-ing @pmoursnv and @salipour in case they want to test or have ideas for CUDA and HIP.
89e261739a
tobf931d3d1c
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