BLI: faster float<->half array conversions, use in Vulkan #127838

Merged
Aras Pranckevicius merged 5 commits from aras_p/blender:fp16_conv_batch into main 2024-09-22 17:40:13 +02:00

In addition to float<->half functions to convert one number (#127708), add float_to_half_array and half_to_float_array functions:

  • On x64, this uses SSE2 4-wide implementation to do the conversion (2x faster half->float, 4x faster float->half compared to scalar),
    • There's also an AVX2 codepath that uses CPU hardware F16C instructions (8-wide), to be used when/if blender codebase will start to be built for AVX2 (today it is not yet).
  • On arm64, this uses NEON VCVT instructions to do the conversion.

Use these functions in Vulkan buffer/texture conversion code. Time taken to convert float->half texture while viewing EXR file in image space (22M numbers to convert): 39.7ms -> 10.1ms (would be 6.9ms if building for AVX2)

In addition to float<->half functions to convert one number (#127708), add `float_to_half_array` and `half_to_float_array` functions: - On x64, this uses SSE2 4-wide implementation to do the conversion (2x faster half->float, 4x faster float->half compared to scalar), - There's also an AVX2 codepath that uses CPU hardware F16C instructions (8-wide), to be used when/if blender codebase will start to be built for AVX2 (today it is not yet). - On arm64, this uses NEON VCVT instructions to do the conversion. Use these functions in Vulkan buffer/texture conversion code. Time taken to convert float->half texture while viewing EXR file in image space (22M numbers to convert): **39.7ms -> 10.1ms** (would be 6.9ms if building for AVX2)
Aras Pranckevicius added 3 commits 2024-09-19 10:30:11 +02:00
So far only simple loop over data using scalar functions.
Still, converting 23M float->half numbers (viewing EXR image) for Vulkan
on Ryzen 5950X: 39.7ms -> 25.4ms
BLI: NEON VCVT path in half<->float array conversions
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c31479b1e8
Aras Pranckevicius requested review from Sergey Sharybin 2024-09-19 11:29:46 +02:00
Aras Pranckevicius requested review from Jeroen Bakker 2024-09-19 11:29:53 +02:00
Jeroen Bakker reviewed 2024-09-19 11:59:13 +02:00
Jeroen Bakker left a comment
Member

I didn't test the code. So only added some small comments.

I didn't test the code. So only added some small comments.
@ -117,0 +246,4 @@
src += 4;
dst += 4;
}
#endif
Member

Would add comment that this will convert the remaining elements.

Would add comment that this will convert the remaining elements.
aras_p marked this conversation as resolved
@ -1004,3 +1004,3 @@
case ConversionType::FLOAT_TO_HALF:
convert_per_component<F16, F32>(dst_memory, src_memory, buffer_size, device_format);
blender::math::float_to_half_array(static_cast<const float *>(src_memory),
Member

Can we remove

static void convert(F16 &dst, const F32 &src)
{
  dst.value = math::float_to_half(src.value);
}

static void convert(F32 &dst, const F16 &src)
{
  dst.value = math::half_to_float(src.value);
}

as those should not be used anymore.

Can we remove ```C static void convert(F16 &dst, const F32 &src) { dst.value = math::float_to_half(src.value); } static void convert(F32 &dst, const F16 &src) { dst.value = math::half_to_float(src.value); } ``` as those should not be used anymore.
aras_p marked this conversation as resolved
Aras Pranckevicius added 1 commit 2024-09-19 12:07:48 +02:00
Sergey Sharybin reviewed 2024-09-19 12:21:21 +02:00
@ -117,0 +222,4 @@
{
size_t i = 0;
#if defined(USE_HARDWARE_FP16_F16C) /* 8-wide loop using AVX2 F16C */
for (; i + 7 < length; i += 8) {

Not for this patch, but perhaps we should do runtime check for intrinsics for such functions.

Not for this patch, but perhaps we should do runtime check for intrinsics for such functions.
Author
Member

Yeah I thought about that, but within Blender there's no way to query CPU cap bits right now, right? (only very indirectly through e.g. "what does ffmpeg thinks our CPU caps are?" and so on). Or if there is, where is it?

Yeah I thought about that, but within Blender there's no way to query CPU cap bits right now, right? (only very indirectly through e.g. "what does ffmpeg thinks our CPU caps are?" and so on). Or if there is, where is it?

Check the intern/cycles/util/system.cpp, system_cpu_capabilities(), system_cpu_support_sse42(), system_cpu_support_avx2(). We can copy this function to Blender side.

Check the `intern/cycles/util/system.cpp`, `system_cpu_capabilities()`, `system_cpu_support_sse42()`, `system_cpu_support_avx2()`. We can copy this function to Blender side.
@ -117,0 +231,4 @@
}
#elif defined(USE_SSE2_FP16) /* 4-wide loop using SSE2 */
for (; i + 3 < length; i += 4) {
__m128 src4 = _mm_loadu_ps(src);

It is a bit annoying to do unaligned reads. Maybe it is benefitial to chekc src and dst alignment and have a dedicated code path for this case?

It is a bit annoying to do unaligned reads. Maybe it is benefitial to chekc `src` and `dst` alignment and have a dedicated code path for this case?
Author
Member

I checked on my PC (Ryzen 5950X) whether replacing unaligned loads with aligned ones brings any performance benefit, and as I expected... it is not faster at all; i.e. same performance.

Then I checked Agner Fog's CPU instruction latency/throughput tables, and basically these days there's no performance difference between unaligned load/store and aligned load/store (unaligned are slower in case your data crosses cacheline, but normally that does not happen). Both latency and throughput of unaligned vs aligned have been the same since Intel Ivy Bridge (2012) and AMD Bulldozer (2011).

I checked on my PC (Ryzen 5950X) whether replacing unaligned loads with aligned ones brings any performance benefit, and as I expected... it is not faster at all; i.e. same performance. Then I checked Agner Fog's CPU instruction latency/throughput tables, and basically these days there's no performance difference between unaligned load/store and aligned load/store (unaligned are slower in case your data crosses cacheline, but normally that does not happen). Both latency and throughput of unaligned vs aligned have been the same since Intel Ivy Bridge (2012) and AMD Bulldozer (2011).
aras_p marked this conversation as resolved
@ -117,0 +240,4 @@
}
#elif defined(USE_HARDWARE_FP16_NEON) /* 4-wide loop using NEON */
for (; i + 3 < length; i += 4) {
float32x4_t src4 = vld1q_f32(src);

Did you experiment with using more than one register for conversion? Something like an extra loop

  for (; i + 7 < length; i += 8) {
    float16x4_t src4_1 = vld1_f16((const float16_t *)src);
    float16x4_t src4_2 = vld1_f16((const float16_t *)src + 4);
    float32x4_t f4_1 = vcvt_f32_f16(src4_1);
    float32x4_t f4_2 = vcvt_f32_f16(src4_2);

    vst1q_f32(dst, f4_1);
    vst1q_f32(dst + 4, f4_2);
    src += 8;
    dst += 8;
  }

I didn't check details for this use-case, but for kernels like dot-product having multiple accumulators gives measurable speedup.

Did you experiment with using more than one register for conversion? Something like an extra loop ``` for (; i + 7 < length; i += 8) { float16x4_t src4_1 = vld1_f16((const float16_t *)src); float16x4_t src4_2 = vld1_f16((const float16_t *)src + 4); float32x4_t f4_1 = vcvt_f32_f16(src4_1); float32x4_t f4_2 = vcvt_f32_f16(src4_2); vst1q_f32(dst, f4_1); vst1q_f32(dst + 4, f4_2); src += 8; dst += 8; } ``` I didn't check details for this use-case, but for kernels like dot-product having multiple accumulators gives measurable speedup.
Author
Member

I can try, but the primary reason why it ends up helping accumulation/dot-product is because the loops in there are serial, and by doing 2 (or more) accumulations at once, you're allowing CPU to have more things processed in parallel. Whereas this half<->float loop does not have dependencies between the loop iterations; the CPU can already schedule/process ahead as much as it can.

I can try, but the primary reason why it ends up helping accumulation/dot-product is because the loops in there are serial, and by doing 2 (or more) accumulations at once, you're allowing CPU to have more things processed in parallel. Whereas this half<->float loop does *not* have dependencies between the loop iterations; the CPU can already schedule/process ahead as much as it can.

Sure. I am just on a skeptical side and double-check whether CPU actually does of what you logically expect from it.
But it is not something I'd call essential to happen for this PR.

Sure. I am just on a skeptical side and double-check whether CPU actually does of what you logically expect from it. But it is not something I'd call essential to happen for this PR.
Author
Member

Yeah, just tried going 2x wider and 4x wider within one loop iteration. On Mac M1 (NEON path), does not bring any performance benefits at all.

Yeah, just tried going 2x wider and 4x wider within one loop iteration. On Mac M1 (NEON path), does not bring any performance benefits at all.

Thanks for checking!

Thanks for checking!
Sergey marked this conversation as resolved
@ -107,0 +171,4 @@
double t0 = BLI_time_now_seconds();
size_t sum = 0;
blender::math::half_to_float_array(src, dst, test_size);
for (int i = 0; i < test_size; i++) {

Don't think we should be including this look into the timing.

Don't think we should be including this look into the timing.
Sergey Sharybin approved these changes 2024-09-20 15:36:32 +02:00
Sergey Sharybin left a comment
Owner

Perosnally i'd put the end timing before the loop which sums the elements in the result. But if you have stronger feelings about it, just stick to the current code.
The rest seems fine, so marking it as green so ti can go in without extra review iterations.

Perosnally i'd put the end timing before the loop which sums the elements in the result. But if you have stronger feelings about it, just stick to the current code. The rest seems fine, so marking it as green so ti can go in without extra review iterations.
Aras Pranckevicius added 1 commit 2024-09-22 14:54:33 +02:00
Merge branch 'main' into fp16_conv_batch
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a40d8c5dae
# Conflicts:
#	source/blender/blenlib/tests/BLI_math_half_test.cc
Author
Member

@blender-bot build

@blender-bot build
Aras Pranckevicius merged commit c6f5c89669 into main 2024-09-22 17:40:13 +02:00
Aras Pranckevicius deleted branch fp16_conv_batch 2024-09-22 17:40:16 +02:00
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Reference: blender/blender#127838
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